FIG. 1 is a schematic plan of an array substrate of prior art. As shown in FIG. 1, the array substrate includes gate lines 10 on the base substrate, and data lines 20 perpendicular to the gate lines 10, wherein the gate lines 10 and the data lines 20 define pixel areas. In the pixel areas, there are pixel electrodes 40, comb-like common electrodes 30 over the pixel electrodes and thin film transistors (TFTs) 50. A long side of the pixel area of the array substrate of this structure is a data line 20, and a short side is a gate line 10.
FIG. 2 is a schematic diagram of input voltage signal of common electrodes on the array substrate shown in FIG. 1. As shown in FIG. 2, a steady voltage signal 41 is input to the common electrodes 30 over the data lines 20.
FIG. 3 is a schematic diagram of input voltage signal of data lines on the array substrate shown in FIG. 1. As shown in FIG. 3, when the voltage signal 21 of data lines 20 varies, the voltage of common electrodes 30 over the data lines 20 will be influenced, resulting in the final output voltage signal of common electrodes 30 as shown in FIG. 4, thereby the coupling capacitance between data lines 20 and common electrodes 30 will be generated, which influences the voltage of common electrodes 30.
At present, large size TV products and 3D products are the trend of development in present TV manufacturing field. However, in order to smoothly develop large size products and 3D products, for example, the driving frequency of the products needs to be increased from 60 Hz to 120 Hz and even 240 Hz.
However, for the array substrate shown in the above-mentioned structure diagram 1, there exists coupling capacitance between data lines 20 and common electrodes 30 and charging time for pixels is short. Therefore, while driving at high frequency, the voltage of common electrodes will be influenced such that the product's picture becomes greenish and the issue of picture distortion will be difficult to be overcome even if a SVC (Switching Virtual Circuit) circuit is used.